The testing of integrated circuits has evolved into a highly developed area of technology. Generally such testing may be implemented through the use of external equipment, Built-In Self-Test (BIST) circuitry, or a combination of the two. Typically, all test methodologies involve shifting data into scannable memory elements of an integrated circuit device (e.g., Level Sensitive Scan Design or LSSD latches), capturing the input to the memory elements, shifting the captured data out and then comparing the captured data with predetermined values to determine whether the circuit has performed according to design. Automatic test pattern generation (ATPG) systems use tools for testing digital circuits after the circuits have been manufactured. In general, an ATPG tool generates a set of test vectors that are applied to a circuit under test. The output of the circuit is analyzed to identify logic faults in the circuit design (i.e., “functional testing”), as well as detecting fabrication defects (i.e., “structural testing”).
“At-speed” testing refers to testing techniques to detect defects that are only apparent when the circuit is running at system speed. Many time-based defects cannot be detected unless the circuit is run at-speed. Examples of time related defects that occur at-speed include high impedance shorts, in-line resistance, and cross talk between signals. A problem of particular concern in regard to at-speed structural testing (ASST) is that the testing of multiple synchronous and asynchronous clock domains while using functional clocks generated by phase locked loops (PLLs) is computationally intensive and prone to poor coverage. One known methodology models chip-internal at-speed clocks, e.g., functional clocks that are inside the chip, as four clock edges in the test sequence. However, in a test group having more than one domain, the number of clock edges exponentially increases, resulting in too many events to simulate which results in long test generation times and low test coverage results.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.